Staff/Senior Staff Engineer – ARM GIC & CPU Post-Silicon Validation

Qualcomm•Published 4 days ago•First seen 3 days ago

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Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Role Overview:

We are looking for an experienced CPU/SoC Validation Engineer with strong knowledge of ARM Generic Interrupt Controller (GIC) architecture and hands-on experience in post-silicon validation, system-level debugging. The engineer will own validation of interrupt-controller functionality across CPU, firmware, power-management, and OS interactions.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Key Responsibilities

Develop and execute post-silicon validation plans for ARM GICv3/GICv4 and CPU interrupt subsystems.
Validate GIC components including: Distributor (GICD)Redistributor (GICR)CPU interface and system registersInterrupt Translation Service (ITS)SGI, PPI, SPI and LPI interrupt flows
Validate interrupt routing, prioritization, masking, preemption, affinity, acknowledgement and EOI behavior.
Develop stress scenarios covering: Concurrent interrupt generationHigh interrupt ratesMulti-core interrupt routingSGI broadcast and targeted SGIsInterrupt migration and CPU hotplugInterrupt handling during CPU idle and low-power transitions
Validate GIC behavior across CPU power collapse, suspend/resume, reset and DVFS transitions.
Debug complex issues involving lost interrupts, unexpected routing, interrupt latency, stuck interrupts and incorrect GIC state.
Analyze key GIC registers such as GICD, GICR, ICC system registers, ICH virtualization registers and ITS state.
Validate interactions between the GIC and OS/kernel, firmware, hypervisor and power-management software.
Work closely with CPU architecture, firmware, kernel, power-management, design and verification teams to root-cause silicon issues.
Use hardware/software debugging techniques including register dumps, trace, kernel logs, crash dumps and waveform/trace correlation.
Develop automation and stress workloads for interrupt validation and regression testing.
Track validation coverage, defects, risks and closure status through engineering tracking systems.

Required Technical Skills

Strong understanding of ARMv8/ARMv9 architecture.
Strong understanding of ARM GICv3/GICv4 architecture.
Good knowledge of: SGI / PPI / SPI / LPIInterrupt affinity and routingPriority masking and preemptionGroup 0 / Group 1 interruptsSecure and Non-secure interrupt handlingGIC Distributor and RedistributorCPU interface registersITS and MSI-based interruptsVirtual interrupts / vGIC concepts
Understanding of CPU power states, clock/power collapse, reset sequences and low-power entry/exit.
Programming/scripting experience with C/C++, Python and shell scripting.
Experience with JTAG/debuggers and SoC debug methodologies is desirable.

Preferred Experience

7 to 16 years of relevant experience - A Must
CPU/SoC post-silicon validation or silicon bring-up experience.
Validation of ARM-based multicore SoCs.
Knowledge of virtualization, hypervisors and virtual interrupt handling.
Experience debugging interactions among GIC, CPU low-power states, DVFS and firmware.
Ability to convert architectural requirements into validation scenarios, stress tests and measurable coverage.

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