Mixed-Signal IC Designer
THE OPPORTUNITY
Lumai is redefining how the world computes. We are an ambitious, venture-backed UK startup building an AI accelerator for the data centre that performs computation in 3D free-space optics, using light rather than electricity to run the matrix multiplications at the heart of AI inference.
Our technology unlocks performance and efficiency gains that could reshape the economics of AI infrastructure: orders of magnitude more throughput at a fraction of the energy of conventional approaches.
If you want to work on technology that did not exist five years ago, and to see the direct impact of what you build, Lumai is where you can make it happen.
ABOUT LUMAI
Founded in 2022 as a University of Oxford spinout, Lumai uses optical processing to accelerate large language models and other transformer-based AI systems. Our team brings together optical computing, machine learning and physics expertise alongside silicon, systems and compiler engineers.
We have raised over $15 million from leading deep-tech investors, including Constructor Capital, IP Group and PhotonVentures, plus government grants, and are scaling rapidly to deploy the fastest optical compute available globally. We offer a collaborative, low-ego culture, meaningful equity, and the rare opportunity to shape both the hardware and the software defining the next era of AI compute.
About the role
Behind every high-speed analog front end sits a layer of infrastructure that has to just work: clean references, stable biasing, and clocks that arrive where and when they're needed. As a Mixed-Signal IC Designer at Lumai, you will design the circuits that make that infrastructure possible: bias and reference generation, PLLs, and the interface circuits that connect our analog and digital domains.
You will work on a variety of mixed-signal building blocks that support Lumai's photonic receiver chain and broader ASIC platform, with plenty of scope to grow technical depth in clocking and reference design as the team scales.
You will report to the Senior Analog/Mixed-Signal Design Lead and work closely with data converter designers, digital/RTL engineers, and layout to deliver robust, silicon-provable mixed-signal IP.
Key Responsibilities
• Design analog/digital interface circuits, including level shifters, drivers, and I/O structures that connect analog blocks to digital logic.
• Design bias and voltage/current reference generation circuits (bandgaps, LDOs, current references) with attention to PSRR, temperature stability, and noise.
• Design and characterise PLLs and clock generation/distribution circuits supporting converter and digital timing requirements.
• Build simulation testbenches covering PVT corners and mismatch analysis appropriate to each block's sensitivity.
• Collaborate with layout engineers on matching-critical and noise-sensitive floorplanning for bias, reference, and clocking blocks.
• Support integration of mixed-signal IP into larger sub-systems, working with data converter and digital teams to close interface specifications.
• Contribute to bring-up planning and support bench characterisation of mixed-signal blocks post-tapeout.
• Participate in design and code reviews, contributing to the team's growing library of reusable mixed-signal IP.
Requirements
• 3–8 years of mixed-signal or analog IC design experience.
• Hands-on experience with at least one of: PLL/clock generation, bias/reference generation, or analog/digital interface circuit design.
• Working proficiency with Cadence Virtuoso/Spectre or equivalent full-custom design tools.
• Solid understanding of PVT and mismatch effects on circuit performance, and how to design for robustness across corners.
• Exposure to at least one tapeout, whether as primary designer or as a significant contributor.
• Comfortable working across the analog/digital boundary and collaborating with adjacent design disciplines.
Nice to Have
• Experience with clock distribution for high-speed data converters or SerDes-adjacent circuits.
• Exposure to advanced CMOS or FD-SOI nodes (e.g. TSMC N12 or comparable).
• Familiarity with low-noise/low-jitter design techniques for PLLs.
• Prior startup or fast-paced fabless design environment experience.
• Basic scripting skills (Python, Skill, or similar) for simulation automation.
INTERVIEW PROCESS
Our process is four stages. An initial conversation with our HR team to understand what you want from the role and what we want from it. Two technical sessions with members of our analog design and ASIC physical design teams. Finally, an HR-team session covering scope, terms, and any final questions. We aim to move fast on candidates we are excited about; expect roughly three to four weeks end to end.
Lumai is an equal opportunity employer. We make hiring decisions on merit, scope-fit, and the strength of the working relationship we expect to build with each hire. Applications welcome from candidates of any background. If you are not sure whether you are a fit, send a note anyway.
About us
We are a deeptech AI hardware company based in Oxford, UK, building next-generation silicon and the software stack to run it. Our team combines hardware architects, ML researchers, compiler engineers, and systems software experts working together to push the boundary of what AI accelerators can do. We offer a collaborative, low-ego culture, meaningful equity, and the rare opportunity to shape both the hardware and software defining the next era of AI compute.