Memory Design Manager
We are looking for a technical manager who is excited to join a growing group of diverse talents responsible for driving novel memory solutions for the leading-edge AI and HPC chips. You will be part of a memory solution team developing high-density memory macro, complex analog, and chip interface circuits for advanced memory technology. We have crafted a team of outstanding engineers stretching around the globe. If you have the dream to develop new technologies and have the real impact on the future of AI compute, this is the ideal position for you.
Job Responsibilities
1. Lead the designs of memory architecture, memory, analog and digital circuits, and test chip, ensuring they meet the performance, power, and area specifications.
2. Provide technical leadership in areas like memory read/write circuits, analog biasing circuits including LDO and charge pump, design-for-test (DFT), function verification, and memory chip integration.
3. Collaborate closely with technologists and customers to define PPA specifications, architecture, and design of memory circuits.
4. Demonstrate hands-on expertise in designing memory circuit blocks and utilizing EDA tools for timing, power, signal integrity, EM/IR analysis, static timing, and noise analysis.
5. Drive design verification and implement quality assurance methodologies for memory IP.
6. Define silicon test plans and provide support for post-silicon bring-up and debugging in collaboration with test teams.
7. Manage design projects by planning and organizing design resources, while addressing customer/client requests and events as they arise.
8. Work closely with cross-functional teams across global locations to ensure successful project execution.
Job Qualifications
1. Master’s or Ph.D. degree in Electrical Engineering.
2. Minimum of 8 years of relevant experience in designing memory products, including memory macros, voltage/current sense amplifiers, area-efficient address decoders, wordline drivers, control circuits, low-power voltage regulators, charge pump circuits, and memory I/O.
3. Strong understanding of advanced memory technologies, architectures, and specifications to make informed decisions for optimal performance/ power/ area trade-offs in memory systems.
4. Proficiency in running industry-standard EDA tools and understanding of design-for-test (DFT) circuit is a plus.
5. Previous leadership experience is preferred.
6. Strong interpersonal skills and ability and desire to work as a great teammate are huge plus.
TSMC Core Values
At TSMC, we invite talented individuals who share our vision and values to contribute to our continued success. Our core values are the foundation of our culture, guiding every decision and action. We seek applicants who deeply resonate with these principles and embody them in their work:- Integrity: Tell the truth. We do not brag. We do not make commitments lightly. Once we make a commitment, we devote ourselves completely to meeting that commitment.
- Commitment: Employees are dedicated to the company, view the company’s success as their own and work diligently to make their best contributions. As commitment is mutual, the Company strives to serve the best interests of its employees.
- Innovation: Innovation is the wellspring of the Company's growth. It means more than new ideas; it means putting ideas into practice.
- Customer Trust: We strive to build deep and enduring relationships with our customers, who trust and rely on us to be part of their success over the long term.

