Logic Library Development Lead

Summary

Do you have passion to join a world-class Digital Design Engineering group and take imaginative and revolutionary ideas and determine how to turn them into reality! You will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking and groundbreaking ideas to the real world. You’ll help design the tools that allow us to bring customers experiences they’ve never-before envisioned. We have an extraordinary opportunity for Library Development Manager to lead libraries for Apple Products in today’s cutting edge technologies. In this highly visible role, you will be at the heart of a processor design effort, working with the custom digital circuits team, with focus on delivering quality products to market quickly.

Description

Imagine yourself at the center of our cutting-edge processor design in deep submicron technologies, and on standard cell library designs. You will have the opportunity to integrate and come-up with new insights, as well as work with a team of talent engineers. In this role on our custom circuits team, you will:

• Drive internal AI based library development requirements
• Drive logic library requirements for Apple products with internal design teams and CAD/foundry/tool vendors.
• Enable new technology requirements in logic library development flows, working with foundry and internal technology teams.
• Lead library characterization, modeling, genAI, QA activities.
• Collaborate with cross functional organizations on product requirement

  Minimum Qualifications

  • BS and a minimum of 10 years of relevant industry experience

  Preferred Qualifications

  • MSEE preferred*
  • Proven track record of leading highly competitive teams and delivering on time.
  • Background in Library Characterization, Timing/Power/CCS Noise/Variation Modeling, Liberty Formats, Spice simulation, Static Timing and Power Analysis flows, etc.
  • Knowledge of timing modeling of large custom macros and complex sequential flops.
  • Exposure to Design For Test, scan concept and write DFT friendly RTL
  • Understands all aspects of implementation specification, design, timing, power, and flow automation.
  • Data analysis and ML knowledge to study data trend and perform QA on big dataset with automation
  • Experience in using Python/TCL/Perl
  • Knowledge of FE modeling/Verilog and/or VHDL, and experience with various EDA tools for characterization, synthesis, place-route, Verilog simulation, spice simulation, formal verification, DRC/LVS, RC extraction and/or library characterization.
  • Proven understanding of device physics and process.
  • Familiar with foundry ecosystem and benchmarking practice.