Hardware Engineer, Infrastructure Silicon Validation
Description
Meta's Infrastructure Silicon team designs and deploys custom silicon solutions that power the compute, networking, and storage infrastructure underpinning Meta's data centers at global scale. As a Hardware Engineer focused on Infrastructure Silicon Validation, you will be responsible for validating custom ASICs and silicon platforms — including compute accelerators, network ASICs, and storage controllers — ensuring they meet functional, performance, and reliability requirements before and after deployment. In this role, you will develop and execute validation strategies, build test infrastructure, and work closely with silicon design, firmware, and data center operations teams to bring next-generation infrastructure silicon from tape-out through production qualification.
Responsibilities
Develop and execute comprehensive validation plans for custom infrastructure ASICs, including compute accelerators, network ASICs, and storage controllers, covering functional correctness, performance, and reliability Design and implement hardware validation frameworks, test benches, and automated test suites to characterize silicon behavior across operating conditions Perform bring-up and debug of custom silicon platforms, identifying and root-causing functional failures, timing violations, and signal integrity issues Collaborate with RTL design and physical design teams to translate design intent into silicon-level validation coverage plans and corner-case test scenarios Partner with firmware and software teams to validate hardware-software interfaces, including register maps, interrupt handling, DMA engines, and PCIe/Ethernet protocol stacks Analyze silicon characterization data to assess performance margins, power consumption, and thermal behavior, providing actionable feedback to design teams Drive post-silicon debug using lab instrumentation such as oscilloscopes, logic analyzers, protocol analyzers, and JTAG-based debug tools Define and track silicon validation milestones, communicate risk and status to cross-functional stakeholders, and drive resolution of blocking issues Contribute to the development of scalable validation infrastructure and methodologies that can be reused across multiple silicon programs Support production qualification and yield analysis by working with manufacturing and data center operations teams to characterize silicon at volume
Qualifications
6+ years of experience in post-silicon validation, hardware bring-up, or silicon characterization of custom ASICs or SoCs Experience developing and executing validation plans for complex digital hardware, including functional verification, performance characterization, and reliability testing Experience debugging hardware failures using lab instrumentation such as oscilloscopes, logic analyzers, JTAG debuggers, and protocol analyzers Experience with scripting or programming languages (e.g., Python, C, or C++) for test automation, data analysis, or hardware control Experience collaborating with RTL design, physical design, and firmware teams to drive silicon bring-up and issue resolution Understanding of embedded systems, including common bus protocols such as I2C, SPI, USB, and/or PCIe Experience with some of the following modules/domains: PCIe, Networking, Ethernet, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM). Experience with application, host driver development etc is a plus Experience working with Emulation/FPGA platforms for test content development, debug, and enablement on post-silicon Experience with Linux systems and server systems management Experience validating data center infrastructure, such as compute accelerators, network ASICs, or storage controllers in a hyperscale or cloud environment