Digital Verification Engineer

Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.

ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future. 

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Digital Verification Engineer

About this role:

As a Digital Verification Engineer at Analog Devices, you will ensure our digital and mixed-signal products behave exactly as specified — before silicon. Guided by experienced engineers, you will take part in the full Metric Driven Verification (MDV) flow across mixed-signal ICs, large-scale SoCs with embedded processors, and hardware-software co-designed products that sense, reason, and act in the real world.

You will work in an AI-augmented engineering environment, where agentic AI tools accelerate testbench development, debug, and regression analysis, and where the engineer stays accountable for every result.

Key Responsibilities:

• Verification Planning: Analyze specifications to define verification scope, features, and coverage goals
• Testbench Development: Build and maintain block- and system-level environments using SystemVerilog, UVM, or C++
• Test and Regression: Create test cases, run regressions, and drive functional and coverage closure
• Debug: Investigate failures across RTL, testbench, and system boundaries, and drive them to resolution with the design team
• Auxiliary Verification: Support formal verification, directed testing, and FPGA-based validation
• AI-Augmented Engineering: Apply agentic AI tools to accelerate verification tasks, while owning the review and validation of their output

Must Have Skills:

• Digital Fundamentals: Solid understanding of digital logic design and the IC design flow
• Verification Methodology: Familiarity with SystemVerilog, UVM, or C++ and simulation-based verification concepts
• Rigor About Correctness: Able to reason about what “correct behavior” means for a specification, and design verification that proves it rather than merely exercises it
• Healthy Skepticism: Questions results that look plausible, cross-checking against the spec or an independent method before trusting them — an instinct we value regardless of prior AI exposure
• Learning Agility: Curious, quick to pick up unfamiliar tools, and comfortable where methodology is still evolving
• Teamwork and English: Strong collaboration, initiative to surface risks early, and sufficient English for daily communication and technical documents

Preferred Education and Experience:

• Master’s degree or above, open to a wide range of STEM majors (electronics, microelectronics, computer science, mathematics, physics, automation, etc.)
• Scripting skills (Python, Perl, Tcl) are a plus
• Hands-on experience with AI coding assistants or agentic development tools is a plus
• Background in AI/ML relevant to edge deployment (inference, quantization, real-time constraints, or AI hardware acceleration) is a plus
• Exposure to formal verification, SVA, or coverage closure is a plus
• Familiarity with AXI/AHB/APB or other bus protocols and verification IP is a plus

Preferred-Beijing

• Digital signal processing, audio systems, or embedded processor architectures
• High-speed / low-latency connectivity and bus protocols
• Intelligent edge systems, robotics, and the verification of deterministic, explainable on-device compute

Preferred-Shanghai

• Closed-loop control systems (e.g., PID, temperature or power management)
• Analog/mixed-signal co-simulation and verification methodology
• System-level integration verification across multiple subsystems, or functional safety

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Graduate JobRequired Travel: No