R&D Power Grid Design and Sign-Off Engineer
In R&D, Design and Technology Platform (DTP) provides differentiated and world-leading design solutions to enable the implementation of System on Chip (SoC) for leading AI/HPC, communication, automotive and IoT applications on TSMC's diverse silicon and packaging technology platform. We work with the world's leading SoC design teams and ecosystem experts to promote industry-leading process design kits (PDKs) and reusable design blocks for the semiconductor intellectual property core (IP), including standard cell libraries, embedded memory, general-purpose input/output (GPIO), simulation and interface IP, as well as electronic design automation (EDA) tools and design flows for monolithic SoCs and heterogeneous 3DICs. This allows us to accelerate the process of transforming innovation into silicon chips and creating revolutionary changes in daily life!
Job Responsibilities
Organization Introduction:
We are power grid design and sign-off team for digital design inside TSMC. The mission is to develop power grid design and co-optimize with semiconductor process in advanced technology nodes for most updated commercial design contents (CPU, GPU, SoC, etc.).
Our power grid designs are references for worldwide 1st Tier design houses.
Responsibilities:
1.Develop power grid structure for most updated commercial design contents (CPU, GPU, SoC, etc.) and check IR/EM (Electron-Migration) performance
2.Provide design solutions for IR/EM and routing optimization
3.Co-work with process R&D for process tuning to achieve better PDN (Power Delivery Network) design
4.Support TSMC advanced process node test chip PDN sign-off checks, including PDN quality check, static/dynamic IR sign-off, and EM sign-off for successful chip tape-out
5.Provide guidance and suggestion to PnR (Place and Route) designer on PDN issue fixing
Job Qualifications
1. Master of Science in Electrical Engineering is required
2. Knowledge of Electronics, Circuitry, and Semiconductor Physics/Devices for PDN structure design and IR results analysis is required
3. Basic programming skills, such as Perl, Python, C++ for flow automation, data analysis, and results summary are required
4. Better to have digital design PnR experience from floorplan stage, placement, CTS (Clock Tree Synthesis) to routing stage
5. Being familiar with digital design PnR flow is preferred
6. Being familiar with SPICE (Simulation Program with Integrated Circuit Emphasis) and mixed-mode simulation is a plus
7. Fluent English in speaking and in writing
#LI-DNI
TSMC Core Values
At TSMC, we invite talented individuals who share our vision and values to contribute to our continued success. Our core values are the foundation of our culture, guiding every decision and action. We seek applicants who deeply resonate with these principles and embody them in their work:- Integrity: Tell the truth. We do not brag. We do not make commitments lightly. Once we make a commitment, we devote ourselves completely to meeting that commitment.
- Commitment: Employees are dedicated to the company, view the company’s success as their own and work diligently to make their best contributions. As commitment is mutual, the Company strives to serve the best interests of its employees.
- Innovation: Innovation is the wellspring of the Company's growth. It means more than new ideas; it means putting ideas into practice.
- Customer Trust: We strive to build deep and enduring relationships with our customers, who trust and rely on us to be part of their success over the long term.

