CPU Logic Design Engineer

Job Details:

Job Description: 

This position requires candidates to upload a resume in English; you are welcome to upload multiple versions of your resume if you prefer but an English version of your resume will be required to be considered for this position.

The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth.

The E-Core CPU team is a CPU Core development team in Guadalajara, Mexico. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we welcome you to join us, to do something wonderful.

The focus of this role is to be part of a team of logic design verification engineers to implement new and existing features for Intel's next generation CPU IP resulting in high quality design. You will be responsible for developing the RTL implementation of new architecture capabilities meeting specification requirements on area, power and performance.

Role responsibilities include although not limited to:

• Development of micro-architecture specification for new design features.
• Performing and debugging digital simulations, and driving to closure of bugs
• Development of functional coverage and achieving coverage goals
• Working closely with architects, and other team members to ensure high quality of design.
• Deliver high-quality output against deadlines and able to work effectively in a cross-site team environment

Qualifications:

Minimum qualifications are required to be initially considered for this position.  Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor's degree in Electrical/Electronics Engineering, Computer Engineering or related field.
• 10 months of experience in:
  • Digital design, ASIC design flow and computer architecture
  • Knowledgeable of at least one programming/scripting languages such as C/C++, Perl, Ruby, Python, and Unix (Linux)
  • Experience with hardware description languages (Verilog or System Verilog)
  • Debug capabilities.
• Advance English level.
• Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).

Preferred Qualifications:

• Experience with Intel Architecture ISA and system architecture, x86 assembly language.
• Experience with low power and clock crossing design

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

A candidate who accepts an offer of employment in Mexico is required to present their own personal identification information and numbers for the following: Mexican Security Number (NSS), Tax Identification Number (RFC) and CURP identification number.

Job Type:

College Grad

Shift:

Shift 1 (Mexico)

Primary Location: 

Mexico, Guadalajara

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.