Lead DFT Design Engineer.

Job Details:

Job Description: 

The Role and Impact

As a Lead DFT Design Engineer, you will play a key role in shaping Intel's cutting-edge silicon products, contributing to their seamless performance and robust testability. Your efforts will directly impact Intel's ability to deliver high-quality, high-performance solutions to our global customers. This role offers the opportunity to work on innovative technologies, collaborate with cross-functional teams, and drive advancements in Design for Test (DFT) methodologies, ensuring Intel maintains its leadership position in the semiconductor industry.

Key Responsibilities

• Lead a small team of engineers to generate and validate SCAN/ATPG content for Intel’s latest server designs.
• Create high-volume manufacturing (HVM) content to support rapid product bring-up and efficient production ramp on automated test equipment (ATE).
• Partner with post-silicon and manufacturing teams to verify DFT features on silicon, support debugging, and document improvements.
• Develop and implement strategies to achieve high test coverage and ensure production quality standards.
• Provide DFT timing closure support and develop test content for manufacturing.
• Collaborate on the definition of architecture and microarchitecture features for blocks, subsystems, and system-on-chips (SoCs) under DFT.
• Optimize designs to reduce test time, vector memory, and defect per million (DPM) rates while ensuring design integrity.
• Review and contribute to verification plans, driving the verification of DFT designs to meet architectural specifications.
• Resolve RTL test failures and ensure the correctness of implemented features.
• Integrate DFT blocks into functional intellectual property (IP) and SoC designs, supporting customers with high-quality IP integration.

Qualifications:

Minimum Qualifications

• BTech in Electronics engineering with VLSI expertise, or a related field.
• 8+ years of experience in DFT with a Bachelor's degree, 6+ years with a Master's degree, or 2 years with a PhD.
• Proficiency in tools like Siemens Tessent, Spyglass, VC, Fusion compiler, VCS is expected
• Hands-on experience with automatic test equipment (ATE) and working knowledge of test content generation for high-volume manufacturing will be a plus
• Strong understanding of power, performance, area, timing optimization, and defect coverage requirements.

Preferred Qualifications

- Effective collaboration and communication skills to engage with cross-functional teams.

- Strong problem-solving abilities to tackle complex design challenges.

- Proven ability to drive innovation and continuous improvement in DFT methodologies and processes.

- Passion for learning and contributing to cutting-edge semiconductor technologies.

Join our team and contribute to Intel's mission of delivering world-class products that transform industries and improve lives.

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.