
Staff Logic Design Engineer
Job Details:
Job Description:
The key responsibilities of this person include the following:
- Logic design, register transfer level (RTL) coding, analog circuit behavioral modeling and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.
- Participating in the definition of architecture and microarchitecture features of the block being designed.
- Applying various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.
- Reviewing the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.
- Supporting SoC customers to ensure high quality integration and verification of the IP block.
- Driving quality assurance compliance for smooth IP SoC handoff.
- Create design documentation
The Logic Design Engineer should possess the following attributes:
- Excellent communication: Expected to drive clarity across partners, managers.
- Excellent teamwork: With a relatively small team, we need everyone to help however and wherever they can.
- Strong analytical and problem-solving skills with the skills to independently draw conclusions.
Qualifications:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering with 8+ years of combined experience OR Master's degree in Electrical/Computer Engineering with 6+ years of combined experience in:
- Mixed-signal design, specifically High-Speed SerDes design and architecture
- Experience with PCS/FEC, gearbox, equalization, and clocking structures
- Experience with pipelining, retiming, clock domain crossings (CDC), and latency optimization
- Experience with post-silicon validation and support of High-Speed SerDes IP
- Experience working with automated Place-and-Route (APR) teams on synthesis, STA constraints, timing closure, and DFT considerations
- Knowledge of FFE/DFE filters, CDR DSP blocks, interpolation/decimation, and adaptive algorithms
- Reading and interpreting technical specifications to develop microarchitecture and implement RTL design in SystemVerilog
Preferred Qualifications:
- Familiarity with AXI, AHB, and APB protocols
- DSP-based CDR design, Forward Error Correction (FEC) coding, hardware/software co-simulation, power/performance optimization, and machine learning-assisted DSP tuning
- Experience with PCIe, Ethernet (100G/400G/800G), CEI, USB, or similar standards
- Scripting proficiency in at least one interpreted language (e.g., TCL, Perl, Python, Ruby)
- Knowledge of UVM/testbench architecture, constrained random testing, and functional coverage
Job Type:
Experienced HireShift:
Shift 1 (Canada)Primary Location:
Canada, TorontoAdditional Locations:
Business group:
Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/AAnnual Salary Range for jobs which could be performed in Canada
CAD 182,580.00-257,760.00Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.Canada Accommodation:
Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here.
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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.